1. Field of the Invention
The present invention relates to a switching power supply system that converts an input voltage to a desired output voltage by carrying out on-off control of switching devices, particularly to a switching power supply system provided with an under voltage lock out circuit (hereinafter referred to as a UVLO circuit).
2. Background Art
A switching power supply system is a power supply system that carries out an on-off control of an input voltage with switching devices to convert the input voltage to a desired output voltage. In general, a switching power supply system contains a UVLO circuit so as not to perform an abnormal operation when the power supply voltage of the internal circuit in the system is no more than the power supply voltage that enables the operation of the internal circuit. The UVLO circuit has a function of detecting an under voltage state of the power supply voltage by comparing a reference voltage with the power supply voltage of the switching power supply system and, when the internal circuit is in an under voltage state of the power supply voltage, terminating the operation of the switching power supply system. FIG. 10 is a block diagram showing an example of the configuration of a switching power supply system containing a related UVLO circuit.
The switching power supply system shown in FIG. 10 is formed of a UVLO circuit 31, an OR circuit 32, a control circuit 3, an output circuit 4, a smoothing circuit 5 and a load circuit 6. The output circuit 4 includes a pair of switching devices QP and QN. The switching device QP is a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor: hereinafter referred to as a PMOS) and the switching device QN is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor: hereinafter referred to as an NMOS). The smoothing circuit 5 includes an inductor L and a capacitor C. In FIG. 10, the control circuit 3 controls the on-off operation of the output circuit 4 to convert an input voltage Vin (an input power supply terminal and its voltage are denoted by the same signs) to an output voltage Vout through the smoothing circuit 5 to drive the load circuit 6.
The UVLO circuit 31 compares the input voltage Vin with a reference voltage to produce an output signal UVLOout that permits a switching operation when the input voltage Vin exceeds the reference voltage and inhibits the switching operation when the input voltage Vin becomes equal to or less than the reference voltage. The output signal UVLOout of the UVLO circuit 31, together with an external control signal ENB, controls the permission or the inhibition of the switching operation of the control circuit 3 through the OR circuit 32.
An example of the circuit configuration of a related UVLO circuit 31 is shown in FIG. 11 (see, for example, Japanese Patent Publication No. JP-A-2006-115594). The related UVLO circuit 31 shown in FIG. 11 has a reference voltage supply terminal Vref with a reference voltage Vref, a voltage dividing circuit formed of resistor elements R11, R12 and R13 connected in series between an input power supply terminal Vin with the input voltage Vin and a ground terminal GND at the ground voltage GND (herein after referred to as GND), a comparator 33 comparing a divided voltage outputted from the voltage dividing circuit with the reference voltage Vref and an NMOS switching device QS. The positive input terminal of the comparator 33 is connected to the reference voltage supply terminal Vref. The negative input terminal of the comparator 33 is connected to the connection point between the resistor element R11 and the resistor element R12 in the voltage dividing circuit to have a divided voltage Vfb of the input voltage Vin inputted. The output side of the comparator 33 outputs an output signal UVLOout and, along with this, is connected to the gate of the NMOS switching device QS. The drain of the NMOS switching device QS is connected to the connection point of the resistor elements with the source connected to GND.
In the UVLO circuit 31 shown in FIG. 11, the divided voltage Vfb, to which the input voltage Vin is divided by the resistor elements R11, R12 and R13, is compared with the reference voltage Vref by the comparator 33. When the divided voltage Vfb is equal to or less than the reference voltage Vref, the level of the output signal UVLOout of the comparator 33 becomes a high level (hereinafter referred to as Hi level) that inhibits a switching operation. While, when the divided voltage Vfb exceeds the reference voltage Vref, the level of the output signal UVLOout of the comparator 33 becomes a low level (hereinafter referred to as Lo level) that permits a switching operation. That is, the threshold voltage (the voltage at which the level of the output signal is switched between the Hi level and the Lo level) is the reference voltage Vref.
The turning-on and -off of the NMOS switching device QS is controlled by the output signal UVLOout of the comparator 33 to switch the states of the resistor element R13 between short circuit and conduction. With the voltage level of the divided voltage Vfb when increasing the input voltage Vin is made differed from the voltage level of the divided voltage Vfb when decreasing the input voltage Vin, a hysteresis characteristic is brought into actualization in the output of the comparator 33. The hysteresis characteristic prevents the switching power supply system from unstable operations at a transition such as turning on the power. Namely, an increase in the input voltage Vin makes the divided voltage Vfb exceed the reference voltage Vref to switch the level of the output signal UCLOout from the Hi level that inhibits a switching operation to the Lo level that permits a switching operation to thereby start a switching operation. However, the switching operation causes a current flowing in the switching power supply system to increase, which decreases input voltage Vin to cause the divided voltage Vfb to come to be below the reference voltage Vref. Then, when no hysteresis characteristic is provided, the level of the output signal UVLOout is switched from the Lo level to the Hi level again to result in the stop of the switching operation. A hysteresis characteristic is to prevent such an unstable operation.
As was explained in the foregoing, the related UVLO circuit 31 shown in FIG. 11 compares the divided voltage Vfb, which is provided by dividing the input voltage Vin by the resistors connected in series, with the reference voltage Vref by the comparator 33 to produce the output signal UVLOout, by which permission and inhibition of the switching operation of the switching power supply system are controlled.
In the switching power supply system provided with the related UVLO circuit explained above, there were the following problems.
The switching operation of the switching power supply system is controlled by the result of comparison of the reference voltage Vref and the divided voltage Vfb of the voltage dividing circuit of resistors connected in series in the UVLO circuit. Thus, there is a problem in that when setting the threshold voltage and the hysteresis characteristic of the UVLO circuit to each of the various purposes of the use of the switching power supply system, a plurality of reference voltage supplies and voltage dividing circuits of resistors connected in series must be made contained in the UVLO circuit beforehand for being chosen and used for providing a combination of a reference voltage supply and a voltage dividing circuit to a threshold voltage and a hysteresis characteristic being desired, or a switching power supply system containing a UVLO circuit with a reference voltage and a voltage dividing circuit being desired must be provided for each purpose of the use, which causes very poor flexibility in use.
Moreover, there is a further problem in that variations in manufacturing switching devices and resistor elements affects the threshold voltages and hysteresis characteristics of the UVLO circuits. Furthermore, there is another problem in that a current always flowing between the input power supply terminal Vin and GND through the voltage dividing circuit causes consumed electric power to increase.
Embodiments of the invention were made in view of the above problems with an object to be achieved being to solve the above problems and to provide a switching power supply system which contains a UVLO circuit being actualized so that an input voltage is detected as a digital signal for carrying out a digital comparison with a reference voltage and a hysteresis characteristic set in digital data to thereby make a threshold voltage and a hysteresis characteristic of the UVLO circuit easily changed or adjusted to those desired and which therefore consumes low electric power.